In the fabrication of semiconductor devices having multiple wafers arranged in a stacked relationship, it is necessary to achieve accurate wafer to wafer alignment. This alignment must be along both X and Y axes and about a rotational axis of the wafers. The alignment is relative to features on the wafer surfaces generated by lithographic techniques.
Currently, optical targets are cut into semiconductor wafers to perform alignment. While this method is automated, it can only achieve a wafer to wafer accuracy of approximately 5 μm. Achievement of this level of accuracy requires either a longer stroke of the mover or wasted space on the media of the wafer to allow for the misalignment.
Yet another method of achieving wafer to wafer alignment makes use of vias etched into the media in which mechanical locating devices, such as locating pins, are received. It is extremely difficult to etch vertical surfaces accurately into the media. It is also time consuming and generates additional steps which results in added expense.
A need therefore exists to provide a wafer that can be easily and accurately aligned.